Minimizing miss ratio using Modified Cache Memory Replacement Algorithm (M-CAR)


Author(s): Mohsin Raad Kareem*, Salam Ayad Hussein, Dena Nader George

Through taking advantage of locality in memory accesses, caching can be defined as a fundamental approach frequently used for hiding the latency gap between Central Processing Unit (CPU) and Main Memory (MM). In order to decide which blocks to remove from the cache memory in the event of the cache miss, various cache replacement methods are used, each of which has significantly distinctive influence on system performance. Through making the best use of cache's entire size, reducing miss ratio as much as it is feasible, and obtaining maximum system performance possible, such replacement approaches strive to move closer to the ideal scenario. A modified approach called (M-CAR) will be introduced in this study using the clock with adaptive replacement algorithm (CAR), which delivers a greater hit ratio compared to conventional method.